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 300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
FEATURES
Low dropout voltage: 180mV at 300mA (Vo=3.3V) Quiescent current: Typ. 65A 2% Voltage Accuracy High PSRR: 70dB at 1KHz Thermal Shutdown Current Limiting Excellent line and load regulation Fast response Short circuit protection Low temperature coefficient Shutdown current: 0.5A Space saving SOT23-5L package
GENERAL DESCRIPTION
The FSP2132 series of positive voltage linear regulators feature low quiescent current (Typ. 65A) and low dropout voltage, making them ideal for battery powered applications. Their high PSRR make them useful in applications where AC noise on the input power supply must be suppressed. Space saving SOT23-5L package is attractive for portable and handheld applications. They have both thermal shutdown and a current limit feature to prevent device failure from extreme operating conditions. They are stable with an output capacitor of 2.2F or greater.
APPLICATIONS
Cordless phones Cellular phones Bluetooth earphones Digital Cameras Portable electronics WLANs MP3 players
PIN CONFIGURATION
(Top View)
1 2 3
5
4
PIN DESCRIPTION
Pin Number 1 2 3 4 5 Pin Name VIN GND EN BYP VOUT Pin Function Input Ground Chip Enable (active high) Bypass pin, need a 10F capacitor connected to GND Output
BLOCK DIAGRAM
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2007-8-6
300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
TYPICAL APPLICATIONS CIRCUITS
ABSOLUTE MAXIMUM RATINGS
Parameter Input Supply Voltage Output Current Output Pin Voltage ESD Rating Internal Power Dissipation Junction to Case Thermal Resistance (JC) Junction to Ambient Thermal Resistance (JA) Operating temperature Operating Junction Temperature Storage Temperature Rating +6 300 GND-0.3 to VIN+0.3 Class B 400 130 250 -40 to 85 -40 to 125 -65 to 150 mW / W / W C C C C Unit V mA V
Lead Temperature (Soldering, 5 sec) 300 Note: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.
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2007-8-6
300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
(VIN = VO + 1V, CIN = 1F, CO = 2.2F, TA= 25C unless otherwise specified.) PARAMETER Input Voltage Output Voltage Accuracy Output Current Ground Current Quiescent Current SYMBOL VIN VO IO IGND IQ TEST CONDITIONS IO= 1mA IO= 1mA to 300mA IO= 0mA IO= 1mA, VO < 2V VIN =2.8V to 3.8V IO= 1mA, 2 VO < 3.3V VIN =VO + 0.5V to VO + 1V IO= 1mA, VO 3.3V VIN =VO + 0.5V to VO + 1V IO = 1mA to 300mA IO = 1mA IO = 1mA IO = 1mA IO = 100mA f=100Hz CBYP = 10nF f= 1KHz Vo =1.8V f= 10KHz IO = 100mA Vo =1.8V f=100Hz f= 1KHz f= 10KHz VO= 1.8V MIN Note1 -2 300 70 65 -0.15 -0.1 -0.4 -1 0.1 0.03 0.2 0.2 40 150 30 70 70 50 70 60 40 850 370 180 1.5 0.3 50 TYP MAX 5.5 +2 Note2 90 90 0.15 0.1 0.4 1 % ppm/C C C %/V UNIT V % mA A A
ELECTRICAL CHARACTERISTICS
Line Regulation
LNR
Load Regulation Error Temperature Coefficient Over Temperature Shutdown Over Temperature Hystersis Power Supply Ripple Rejection (with bypass Cap.) Power Supply Ripple Rejection (without bypass Cap.)
LDR TC OTS OTH PSRR
dB
PSRR
Dropout Voltage EN Input High Threshold EN Input Low Threshold Output Noise
VDO VIH VIL Vn
IO = 300mA
2.5 VO < 3.3V VO 3.3V VIN = 2.5V to 5V VIN = 2.5V to 5V
1100 450 230
mV V V VRMS
CBYP =10nF, f = 10Hz to 100kHz
Shutdown Current ISD VEN = 0V 0.01 1 A Note 1The minimum input voltage of the FSP2132 is determined by output voltage and dropout voltage. The minimum input voltage is defined as: VIN(MIN)=VO+VDROP Note 2Output current is limited by PD, maximum IO=PD/(VIN(MAX)-VO)
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2007-8-6
300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
APPLICATION INFORMATION
Capacitor Selection and Regulator Stability Similar to any low dropout regulator, the external capacitors used with the FSP2132 must be carefully selected for regulator stability and performance. Using a capacitor, CIN, whose value is1F at the FSP2132 input pin, the amount of the capacitance can be increased without limit. Please note that the distance between CIN and the input pin of the FSP2132 should not exceed 0.5 inch. Ceramic capacitors are suitable for the FSP2132. Capacitors with larger values and lower ESR provide better PSRR and line-transient response. The FSP2132 is designed specifically to work with low ESR ceramic output capacitors in order to save space and improve performance. Using an output ceramic capacitor whose value is 2.2F with ESR5m ensure stability. A 10nF bypass capacitor connected to BYP pin is suggested for suppressing output noise. The capacitor, in series connection with an internal 200k resistor, forms a low-pass filter for noise reduction. Increasing the capacitance will slightly decrease the output noise, but increase the start-up time. Load Transient Considerations The figure11 shows the FSP2132 load transient response. It shows two components the output response: a DC shift from the output impedance due to the load current change and transient response. The DC shift is quite small due to excellent load regulation of the FSP2132. The transient spike, resulting from a step change in the load current from 1mA to 300mA, is 20mV. The ESR of the output capacitor is critical to the transient spike. A larger capacitance along with smaller ESR results in a smaller spike. Shutdown Input Operation The FSP2132 is shutdown by pulling the EN input low, and is turned on by tying the EN input to VIN or leaving the EN input floating. Internal P-Channel Pass Transistor The FSP2132 features a 0.75 P-Channel MOSFET device as a pass transistor. The P-MOS pass transistor enables the FSP2132 to consume only 65A of ground current during low dropout, light load, or heavy load operations. This feature increases the battery operation life time. Dropout Voltage A regulator's minimum dropout voltage determines the lowest usable supply voltage. The FSP2132 has a typical 300mV dropout voltage. In battery powered systems, this will determine the useful end-of-life battery voltage. Current Limit and Short Circuit Protection The FSP2132 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output current can be limited to 400mA by regulating the gate voltage. The FSP2132 also has a built-in short circuit current limit. Thermal Considerations Thermal protection limits power dissipation in the FSP2132. When the junction temperature exceeds 150, the OTP (Over Temperature Protection) starts the thermal shutdown and turns the pass transistor off. The pass transistor resumes operation after the junction temperature drops below 120. For continuous operation, the junction temperature should be maintained below 125. The power dissipation is defined as : PD=(VIN-VOUT)*IO+VIN*IGND The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surrounding airflow and temperature difference between junction and ambient. The maximum power dissipation can be calculated by the following formula: PD(MAX)=(TJ(MAX)-TA)/JA Where TJ(MAX) is the maximum allowable junction temperature 125. TA is the ambient temperature and JA is the thermal resistance from the junction to the ambient. For example, JA is 250/W for the SOT23-5L package, based on the standard JEDEC 51-3 for a single layer thermal test board. The maximum power dissipation at TA=25 can be calculated by the following formula: PD(MAX)= (125-25)/250=0.4W It is also useful to calculated the junction temperature of the FSP2132 under a set of specific conditions. In this example let the input voltage VIN=3.3V, the output current IO=300mA and the case temperature TA=40 measured by a thermal couple during operation. The power dissipation for the VO=2.8V version of the FSP2132 can be calculated as: PD=(3.3V-2.8V)*300mA+3.3V*70A150mW And the junction temperature, TJ, can be calculated as follows: TJ=TA+PD*JA TJ=40+0.15W*250/W =77.5TJ(MAX) =125
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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
For this operating condition, TJ, is lower than the absolute maximum operating junction temperature, 125, so it is safe to use the FSP2132 in this configuration.
TYPICAL PERFORMANCE CHARACTERISTICS
(VIN = VEN , CIN = 1F, CO = 2.2F , CBYP =10nF TA = 25C unless otherwise specified.)
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2007-8-6
300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
TYPICAL PERFORMANCE CHARACTERISTICSCONTINUED
(VIN = VEN , CIN = 1F, CO = 2.2F , CBYP =10nF TA = 25C unless otherwise specified.)
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2007-8-6
300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
TYPICAL PERFORMANCE CHARACTERISTICSCONTINUED
(VIN = VEN , CIN = 1F, CO = 2.2F , CBYP =10nF TA = 25C unless otherwise specified.)
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2007-8-6
300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
TYPICAL PERFORMANCE CHARACTERISTICSCONTINUED
(VIN = VEN , CIN = 1F, CO = 2.2F , CBYP =10nF TA = 25C unless otherwise specified.)
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2007-8-6
300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
TYPICAL PERFORMANCE CHARACTERISTICSCONTINUED
(VIN = VEN , CIN = 1F, CO = 2.2F , CBYP =10nF TA = 25C unless otherwise specified.)
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2007-8-6
300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
ORDERING INFORMATION
FSP2132XXXX Package Type: C: SOT23-5L Output Voltage: 40: 4.0V 38: 3.8V 33: 3.3V 31: 3.1V 30: 3.0V 29: 2.9V 285: 2.85V 28: 2.8V 25: 2.5V 18: 1.8V 12: 1.2V Temperature Grade: Packing: A: Tape & Reel D: -40~85
MARKING INFORMATION
XXVYW
Date code: Y: Year W; Week Output Voltage: M: 4.0V O: 3.8V K: 3.3V P: 3.1V J: 3.0V Q: 2.9V I: 2.85V H: 2.8V G: 2.5V E: 1.8V B: 1.2V Product Code
10/11
2007-8-6
300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR
FSP2132
PACKAGE INFORMATION
D
5
4
E1 E
1
e
2
3
b
A1
Symbol A A1 b D E E1 e
Dimensions In Millimeters Min. Max. 0.889 1.295 0.000 0.152 0.353 0.599 2.692 3.099 2.591 2.977 1.397 1.803 0.838 1.041
A
Dimensions In Inches Min. Max. 0.036 0.052 0.000 0.006 0.014 0.024 0.108 0.124 0.104 0.119 0.056 0.072 0.034 0.042
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2007-8-6


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